Low Jitter, 11-output MEMS Network Synchronizer
The SiT95148 is a single-chip MEMS network synchronizer optimized for IEEE 1588 and time synchronization applications. The device comes with 4 independent time domains, 1 mHz to 4 kHz programmable loop bandwidth, low wander mode and fastest hitless switching. Its low noise quad-PLL architecture and programmable output drivers provide up to 10 differential or 20 LVCMOS low jitter clock outputs. It supports 4 additional clock inputs with Frac-N dividers, enabling virtually any input to output frequency translation configurations from 8 kHz to 2.1 GHz.
This network synchronizer integrates SiTime’s third-generation MEMS resonator. This integrated MEMS approach eliminates the dependency on a crystal reference, along with all quartz related issues, offering a true clock-system-on-a-chip that improves system robustness:
- Always-accurate clock synthesis by eliminating crystal capacitive mismatch
- Always-reliable startup even at cold temperature and other harsh environmental conditions
- No jitter degradation due to noise coupling onto a crystal interface
- No activity dips/frequency jumps inherent to quartz
- 10倍的抗振动和弯曲
支持的SiT95148 Time必威体育官网手机登录Master™软件application to simplify clock tree design. The device can also be shipped with a user-specified, factory pre-programmed default startup configuration. The device configuration can be re-programmed twice using two banks of one-time-programmable (OTP) memory during manufacturing or configured in-system via I2C/SPI for additional BOM flexibility. The SiT95148 is also supported with theSiT6503EBevaluation board.
| Number of Inputs | 4 |
| 输出数量 | 11 |
| Input Frequency Range | 8 kHz to 2.1 GHz (differential), 8 kHz to 250 MHz (LVCMOS) |
| Output Frequency Range | 8 kHz to 2.1 GHz (differential), 8 kHz to 250 MHz (LVCMOS), 1 PPS (one output only) |
| Output Type | LVPECL, CML, HCSL, LVDS, LVCMOS |
| Number of PLL/Clock Domains | 4 PLLs, 4 time domains |
| Programmable Loop Bandwidth | 1 mHz to 4 kHz |
| Operating Temperature Range (°C) | -40 to +85 |
| Phase Jitter (rms) | 120 fs |
| Voltage Supply (V) | 1.8, 2.5, 3.3 |
| Operating Mode | Free running, synchronized, holdover |
| Package Type (mm²) | 9x9 mm, 64-pin |
| Features | Low wander mode, hitless switching, zero-delay buffer mode, DCO with 50-ppt resolution, programmable output delay control |
Single-chip network synchronizer consolidates MEMS resonator, multiple clock ICs and oscillators into a single 9 x 9 mm 64-pin device
带有集成MEMS的时钟系统芯片，简化了设计
- No crystal capacity matching, always-accurate frequency synthesis
- No noise coupling onto crystal circuits, guaranteed jitter
- Resistant to vibration and board bending, anywhere PCB replacement
Flexible features for best IEEE 1588, syncE, and timing synchronization performance
- 4 inputs, 11 outputs, 4 PLLs, up to 2.1 GHz output frequency for flexible frequency translation
- Individually configurable output types and voltage to support a wide range of processor and SOCs
- Programmable loop bandwidth (1 mHz to 4 kHz)
- Low wander mode using precision TCXO for clock recovery and OCXO for holdover
- Fastest hitless switching (sub 50 ps phase build-out)
35% space saving ideal for high density designs
- 9 x 9 mm包，无需外部XTAL /振荡器
Semiconductor level quality and reliability, eliminates quartz related issues associated with traditional clocks
- 测量与测试
- Storage, servers and datacenters
SiT6503EB Evaluation BoardUser Manual
TimeMaster for Clocks Software-- Simplifes clock tree design (Contact SiTime)