Four industry standard footprints for drop-in replacement of quartz VCXOs without any board changes
广泛的可编程性
- 电源电压为1.8 V;2.5 v至3.3 v
- 频率稳定性为±25 ppm至±50 ppm
- Pull range from ±50 ppm to ±200 ppm:
- Customized specification for optimal system performance
- Readily available products with any specification within operating range
<1% pull range linearity
- Simpler loop control in software controlled PLL
- More consistent PLL bandwidth over operating range
- Faster calibration and lock time
- Reduction of modulation harmonics
Superior tuning slope consistency
- Tight PLL带宽和更简单的系统设计
Four industry-standard packages
- 100% drop-in replacement of quartz VCXO without any design changes
Ultra-fast lead time (4 to 6 weeks)
- Reduce inventory overhead
- Mitigate shortage risks
- Telecom equipment
- Wireless base stations
- Networked video systems and digitizers
- Set-top boxes (STB)
- Jitter cleaner
- Networked audio systems
- 仪器
- Low-bandwidth analog phase locked loop (PLL)
- FPGA数据恢复
eval委员会(Contact SiTime)–SiT6081 (2520) | SiT6082 (3225) | SiT6083 (5032) | SiT6084 (7050)
频率斜率（DF / DT）计算器– Calculate frequency slope over temperature
时间机器II程序员–Program frequency, voltage, stability & more
2724 4-Pins|3225 4-Pins|50.32 6-Pins|7050 6针– Preview packages withQFN3D步骤模型
